#define MAKENEW(x) #define x SOMETHING_ELSE
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Complex Macros
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Original Post
You mean there isn''t any way to escape a # sign in a macro?
Macros cannot contain other preprocessor directives ( beside the ''stringizing'' # and the ''token pasting'' ## ).
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Interesting...back to the drawing board I guess 
BTW, this is nothing important I''m just kind of tossing around ideas on things I might do, and this seemed like something neat to try out.
BTW, this is nothing important I''m just kind of tossing around ideas on things I might do, and this seemed like something neat to try out.
I think that you are trying to declare variables using names dependant on runtime data (??). If it so, i guess that a dictionary implementation (maybe a hash table if you are interested on performance and not memory) would be a better solution. Also defines work at compile time so if your syntax weren''t incorrect it would have been the same to use #define y SOMETHING_ELSE and MAKENEW (y)
quote:
Original post by hewhay
Also defines work at compile time so if your syntax weren''t incorrect it would have been the same to use #define y SOMETHING_ELSE and MAKENEW (y)
Actually, #define operate before compile-time. That''s why they are called preprocessor macros, and why they let you do things without any language checking. That''s also why preprocessor macros do not respect scope, types ...
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