AMD Processors

I heard the processors have more data pipelines so data can travel through at a much faster rate, thus equalling that of an Intel Pentium processor. It's awesome, because the AMD's can reach such high performance rates and low speeds. Imagine an AMD running at 3.8 GHz!!

AMD CPUs do more things per cycle than Intel, allowing for slowed CPU speed (well, that's what I heard at least).

Processors do not (and have not for many years) done instructions in a single cycle, or even a few cycles. The instructions are sliced up into pieces, each of which is done by a seperate bit in the processor. This is more efficient for various reasons, which I won't go in to. Anyway, the length of the pipeline refers to the maximum number of steps it can take to resolve any instruction completely.

On an Athlon64, it can take up to 12 cycles for an instruction to finish an instruction. On a Pentium 4, it can take up to 31 cycles to finish an instruction. So even though the Pentium's clock speed is much higher, it also takes many more cycles to do the same amount of work that the Athlon64 does.

Basicly a shorter pipeline coupled with more (specialized and not-specialized) execution units.

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Original post by Promit On an Athlon64, it can take up to 12 cycles for an instruction to finish an instruction. On a Pentium 4, it can take up to 31 cycles to finish an instruction. So even though the Pentium's clock speed is much higher, it also takes many more cycles to do the same amount of work that the Athlon64 does.

But unless there are instruction dependencies or cache misses an instruction is executed each clock and every clock there are as many instructions in some stage in the pipeline as pipeline stages. Theoretically a 3Ghz Prescott can execute much more instructions than a 2Ghz Athlon, but branch mispredictions, no free execution units and dependencies all harm the P4's performance more than the Athlon's performance.

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Original post by vNistelrooy Quote: Original post by Promit On an Athlon64, it can take up to 12 cycles for an instruction to finish an instruction. On a Pentium 4, it can take up to 31 cycles to finish an instruction. So even though the Pentium's clock speed is much higher, it also takes many more cycles to do the same amount of work that the Athlon64 does. But unless there are instruction dependencies or cache misses an instruction is executed each clock and every clock there are as many instructions in some stage in the pipeline as pipeline stages. Theoretically a 3Ghz Prescott can execute much more instructions than a 2Ghz Athlon, but branch mispredictions, no free execution units and dependencies all harm the P4's performance more than the Athlon's performance.

Well, yes. But I didn't want to go into all the details about multicycle pipelined designs. That's a book's worth of discussion.

[Edited by - Promit on August 27, 2005 1:31:54 PM]

The Athlon can dispatch and execute 3 instructions per cycle, whereas the P4 can only do 2.

More importantly, the L2 cache on the Athlon lives on the processor itself, instead of further away somewhere else on the board. That means the very common case of L2 hit has a much smaller latency than with P4.

The Prescott can theoretically execute 6 instructions per clock as it can dispatch up to 6 micro-ops per clock. However the P4 specialized execution units (2 duble-pumped integer execution units, 1 integer unit for complex ops, 2 FPU units and 2 load/store units) make it difficult to get close to this number. AMD's Athlon64 has 3 of each, integer, FPU and load/store execution units and can dispatch up to 9 micro-ops. Thanks to it's less specialized execution units, the Athlon64 can usually execute more instructions per clock.
The P4 has the L2 and the L3 caches inside the CPU just like the Athlon.

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Original post by ajas95 More importantly, the L2 cache on the Athlon lives on the processor itself, instead of further away somewhere else on the board. That means the very common case of L2 hit has a much smaller latency than with P4.

I am 99.9999999999999999% sure that all current CPUs (intel and AMD) use onboard catch. This wasn't the case for the original Pentiums IIRC.

Not to mention L3 caches haven't been used in years.

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Original post by Promit Not to mention L3 caches haven't been used in years.

Current Itaniums use L3. A lot of L3. Lots and lots of L3.

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Original post by SiCrane Quote: Original post by Promit Not to mention L3 caches haven't been used in years. Current Itaniums use L3. A lot of L3. Lots and lots of L3.

Yeah...but people don't normally have Itaniums in their desktop.

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Original post by Promit Yeah...but people don't normally have Itaniums in their desktop.

PowerPC G4s have L3, though not nearly as much as Itaniums. And I have one of those on my desktop.

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Original post by Promit Not to mention L3 caches haven't been used in years.

Also, some of the P4 Extreme Edition (not to be confused with the dual core) chips had a large L3 cache. Later CPUs (the 6xx series), have just used larger (2MB) L2 cahes.

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Original post by Sr_Guapo Quote: Original post by Promit Not to mention L3 caches haven't been used in years. Also, some of the P4 Extreme Edition (not to be confused with the dual core) chips had a large L3 cache. Later CPUs (the 6xx series), have just used larger (2MB) L2 cahes.

True, the P4EE have a 2MB L3 cache, but according to Intel's roadmap no CPUs with L3 cache are planned. Only 2MB L2 cache, or 2x2MB L2 cache for dual-core.