Dualcore & Timing

	// CPU Timestamp Counter (incremented every clock)	// ns resolution, moderate precision (poor clock crystal?)	//	// issues:	// - multiprocessor systems: may be inconsistent across CPUs.	//   we could discard really bad values, but that's still inaccurate.	//   having a high-priority thread with set CPU affinity read the TSC	//   might work, but would be rather slow. could fix the problem by	//   keeping per-CPU timer state (freq and delta). we'd use the APIC ID	//   (cpuid, function 1) or GetCurrentProcessorNumber (only available	//   on Win Server 2003) to determine the CPU. however, this is	//   too much work for little benefit ATM, so call it unsafe.	// - deep sleep modes: TSC may not be advanced.	//   not a problem though, because if the TSC is disabled, the CPU	//   isn't doing any other work, either.	// - SpeedStep/'gearshift' CPUs: frequency may change.	//   this happens on notebooks now, but eventually desktop systems	//   will do this as well (if not to save power, for heat reasons).	//   frequency changes are too often and drastic to correct,	//   and we don't want to mess with the system power settings => unsafe.

static uint log_id_bits;	// bit index; divides APIC ID into log and physstatic const uint INVALID_ID = ~0u;static uint last_phys_id = INVALID_ID, last_log_id = INVALID_ID;static uint phys_ids = 0, log_ids = 0;// count # distinct physical and logical APIC IDs for get_cpu_count.// called on each OS-visible "CPU" by on_each_cpu.static void count_ids(){	// get APIC id	u32 regs[4];	if(!ia32_cpuid(1, regs))		debug_warn("cpuid 1 failed");	const uint id = bits(regs[EBX], 24, 31);	// partition into physical and logical ID	const uint phys_id = bits(id, 0, log_id_bits-1);	const uint log_id  = bits(id, log_id_bits, 7);	// note: APIC IDs are assigned sequentially, so we compare against the	// last one encountered.	if(last_phys_id != INVALID_ID && last_phys_id != phys_id)		cpus++;	if(last_log_id  != INVALID_ID && last_log_id  != log_id )		cpus++;	last_phys_id = phys_id;	last_log_id  = log_id;}// fix CPU count reported by OS (incorrect if HT active or multicore);// also separates it into cpu_ht_units and cpu_cores.static void get_cpu_count(){	debug_assert(cpus > 0 && "must know # 'CPU's (call OS-specific detect first)");	// get # "logical CPUs" per package (uniform over all packages).	// TFM is unclear but seems to imply this includes HT units *and* cores!	u32 regs[4];	if(!ia32_cpuid(1, regs))		debug_warn("ia32_cpuid(1) failed");	const uint log_cpu_per_package = bits(regs[EBX], 16, 23);	// .. and # cores	if(ia32_cpuid(4, regs))		cpu_cores = bits(regs[EBX], 26, 31)+1;	else		cpu_cores = 1;	// if HT is active (enabled in BIOS and OS), we have a problem:	// OSes (Windows at least) report # CPUs as packages * cores * HT_units.	// there is no direct way to determine if HT is actually enabled,	// so if it is supported, we have to examine all APIC IDs and	// figure out what kind of "CPU" each one is. *sigh*	//	// note: we don't check if it's Intel and P4 or above - HT may be	// supported on other CPUs in future. all processors should set this	// feature bit correctly, so it's not a problem.	if(ia32_cap(HT))	{		log_id_bits = log2(log_cpu_per_package);	// see above		last_phys_id = last_log_id = INVALID_ID;		phys_ids = log_ids = 0;		if(on_each_cpu(count_ids) == 0)		{			cpus         = phys_ids;			cpu_ht_units = log_ids / cpu_cores;			return;	// this is authoritative		}		// OS apparently doesn't support CPU affinity.		// HT might be disabled, but return # units anyway.		else			cpu_ht_units = log_cpu_per_package / cpu_cores;	}	// not HT-capable; return 1 to allow total = cpus * HT_units * cores.	else		cpu_ht_units = 1;	cpus /= cpu_cores;}