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Makefile question

Started by spraff Dec 7, 2008 at 10:26 AM 1 replies 950+ views
Original Post
spraff
spraff
Hi. Here's a stripped-down version of the makefile I'm creating:

MYLIST	= demo1 demo2

CXX		= g++
CXXFLAGS	= -pipe
LFLAGS		=
.SUFFIXES: .build

.cpp.build: $<
	$(CXX) $(CXXFLAGS) $(LFLAGS) -o "$*.build" "$<"

mylist: $(MYLIST:=.build)
The rule for mylist should expand to "mylist: demo1.build demo2.build" and trigger the .cpp.build rule. When I run this file I get

make: *** No rule to make target `demo1.build', needed by `mylist'. Stop.
Which I don't understand at all. Funny thing is I had a very similar system in another makefile a while ago and that worked then. I made a couple of minor, seemingly irrelevant changes, and now the old makefile is broken too. What am I doing wrong?
JParishy
JParishy
Well, the easy answer is: Don't use makefiles. It's old (crappy) technology. I would suggest switching over to a CMake or SCons (Yummy Python) system. Much less hassle, and something that wasn't released in 1977.
Oxyd
Oxyd
You probably want something like $(BUILDFILES) : %.cpp.build : %.cpp instead of .cpp.build: $<

EDIT: GNU Make docs are actually very helpful, in particular, the Static Pattern Usage section is relevant to your question.

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